Scalable packaging design for large-scale superconducting quantum circuits

While recent progress on superconducting quantum circuits has enabled us to realize intermediate-scale quantum processers, we need to scale up the number of qubits even more to realize a fully fault-tolerant quantum computer. One of the biggest challenges when scaling up the two-dimensional array of qubits is to wire control and readout lines to every qubit in use. The wiring from the side of a chip becomes more difficult with an increased number of qubits. To overcome this difficulty, we propose scalable packaging and wiring schemes based on the vertical connection of coaxial cables from the bottom of the chip. The vertically connected cable and qubit structure enables us to treat the unit structure as a module and scale it up by tiling the same structure in two dimensions. We will present the design and performance of our chip and package. We also discuss the scalability of this scheme by focusing on the spurious mode and cross-talk.