Plasma Ion Doping for Semiconductor Applications
ORAL
Abstract
Plasma doping (PD) provides a potential solution in the search for a shallow, active or high concentration doping method that leaves minimum physical damages. That overcomes the limitations of conventional ion implantation in semiconductor applications.
In this work, processes with Si and Sn ion doping into III-V material and processes with Si, N and H ion doping into HfO2 high-k material have been studied in a high density plasma system. AFM, SIMS, HR-TEM/EDX and XPS have been employed to characterize the effects of the main PD process parameters (plasma source power, gas pressure, bias power and processing time) on dopant depth profile, dopant concentration, doped material surface damage and modification. It is confirmed that ion density and energy determine dopant depth profile. With optimized process parameters, bias power is the most reliable and repeatable input parameter to use to define dopant depth profile and concentration. Additionally, bias power plays a primary role in modulating a process into either ion doping, film deposition or sputtering etching. Finally, an optimized plasma doping process has been developed that achieves sheet resistance reduction for InGaAs as channel materials in a CMOS logic device.
In this work, processes with Si and Sn ion doping into III-V material and processes with Si, N and H ion doping into HfO2 high-k material have been studied in a high density plasma system. AFM, SIMS, HR-TEM/EDX and XPS have been employed to characterize the effects of the main PD process parameters (plasma source power, gas pressure, bias power and processing time) on dopant depth profile, dopant concentration, doped material surface damage and modification. It is confirmed that ion density and energy determine dopant depth profile. With optimized process parameters, bias power is the most reliable and repeatable input parameter to use to define dopant depth profile and concentration. Additionally, bias power plays a primary role in modulating a process into either ion doping, film deposition or sputtering etching. Finally, an optimized plasma doping process has been developed that achieves sheet resistance reduction for InGaAs as channel materials in a CMOS logic device.
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Presenters
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Hongwen Yan
IBM TJ Watson Research Center
Authors
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Hongwen Yan
IBM TJ Watson Research Center
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Hiro Miyazoe
IBM Research, T.J. Watson Research Center
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Marinus Hopstaken
IBM Research, T.J. Watson Research Center
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Sebastian Engelmann
IBM Research, T.J. Watson Research Center
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Takashi Ando
IBM Research, T.J. Watson Research Center
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Kevin Chan
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