Improving the yield of frequency-fixed superconducting qubit systems using siZZle-CZ gates

The fixed-frequency superconducting transmon processor is a promising quantum computing platform that features a simple structure and high coherence. In fixed-frequency transmon, cross-resonance (CR) gates are widely used as two-qubit gates, but strict requirements are imposed on the qubit frequency to achieve high-fidelity multi-qubit control. Due to the large variation of resonance frequencies that occurs during fabrication, it becomes difficult to meet these requirements in large-scale processors.

In this study, we have demonstrated an improvement in the zero-collision yield of a quantum processor by adopting the ZZ interaction induced by off-resonance Stark tones (siZZle [1]) as two-qubit gates instead of CR gates. We investigate the qubit parameter dependence of the fidelity of the siZZle-CZ gate by numerical calculation, and show that there are parameter conditions that can realize CZ gates with 99.7% fidelity and are robust against the variation of the qubit detuning. Furthermore, it is shown that under these parameter conditions, the zero collision yield in a square lattice of 1024 qubits reaches almost 100% when the qubit frequency variation is assumed to be 0.25%.

[1] B. K. Mitchell et al., Phys. Rev. Lett. 127, 200502 (2021); K. X. Wei et al., Phys. Rev. Lett. 129, 060501 (2022).