Fast and Parallelizable Logical Computation with Homological Product Codes

Quantum error correction (QEC) schemes typically suffer from large overheads in both space and time. High-rate quantum low-density-parity-check (qLDPC) codes promise a route to reduce qubit numbers, but encoded computations with these codes have required serialization of operations and extra time costs. In this work, we present new logical gadgets for qLDPC codes that enable fast and parallelizable logical computations. Our main gadget performs a selected set of Pauli product measurements (PPMs) in parallel on a data qLDPC code by constructing a structured ancilla qLDPC code and coupling it to the data code via parallel logical CNOTs. For hypergraph product (HGP) codes, the ancilla code can be constructed by simply puncturing/augmenting the base classical codes of the data code, achieving parallel PPMs on any subgrid of the data logical qubits. Generalizations to 3D and 4D homological product codes further feature fast PPMs in constant depth. We initiate the study of logical compilation with our expanded set of native qLDPC gadgets, constructing algorithmic primitives for preparing k qubit GHZ states and distilling/teleporting k magic states with $O(1)$ space overhead in $O(1)$ and $O(\sqrt{k} \log k)$ logical cycles, respectively. We further demonstrate the efficient implementation of key algorithmic subroutines, such as the quantum adders, using qLDPC blocks and parallel operations.