Accelerated Compute for Quantum Error Correction

The realization of a fault-tolerant quantum computer for industry scale applications is one of today’s grand challenges of science and engineering. Fault-tolerance will require quantum error correction (QEC) to protect quantum information stored on quantum computers from a variety of sources of noise. The overhead of QEC is significant and increases the space and time requirements of an industry scale quantum computer considerably. QEC also requires considerable classical computational resources, and tight coupling between classical and quantum computers.



This talk will examine the classical compute requirements for QEC for a variety of use cases, with an emphasis on quantum low-density parity check (qLDPC) codes. We will discuss the requirements on compute, bandwidths, and latencies for problem sizes relevant to quantum computers of the near future. We will then examine how various accelerated compute platforms can take on these challenges, and the role that quantum-classical hardware codesign can play.