Efficient and robust parallel calibration of single- and two-qubit gates in superconducting quantum processors.

As quantum processors scale up, efficient and reliable in situ gate calibrations become increasingly crucial. This work presents strategies for the parallel calibration of both single- and two-qubit gates in large superconducting quantum processors.

For single-qubit gates, we demonstrate how error amplification techniques developed for isolated gates can be adapted to enhance the fidelity of simultaneous operations. We also introduce methods to characterize and mitigate phase errors on idling qubits caused by fast gates. For two-qubit gates, our focus is on the calibration of parallel iSWAP gates. We apply Floquet calibration techniques to optimize simultaneous gates and address the impact of flux crosstalk on idling qubits. Strategies to mitigate undesired Z rotations on idling qubits are also discussed.

We provide experimental data demonstrating the scalability of these techniques and their implications for maintaining performance in large quantum processors. This work offers a pathway for future large-scale quantum computer calibration strategies.