Hardware Efficient Randomized Compiling

Randomized compiling (RC) is a widely used quantum error mitigation protocol which tailors coherent errors into stochastic Pauli channels. In RC, a quantum circuit is "randomly compiled" N times, where each randomization applies a different set of Pauli twirling gates for each gate cycle. Implementing RC comes with a large classical overhead -- it requires that the full circuit is recompiled for each randomization, imposing a factor O(N) on the compilation and upload time. We have developed a hardware-efficient protocol for performing randomized compiling in real time on the control FPGA, eliminating the O(N) classical overhead. Additionally, our algorithm has zero runtime overhead and negligible FPGA resource utilization. In this talk, we describe the implementation of our protocol on the QubiC control system, present significant improvements in compilation and execution time, and experimentally demonstrate successful noise tailoring with superconducting qubits.