Negative Differential Capacitance in Low-Power Ferroelectric-FET Devices with Hf<sub>0.5</sub>Zr<sub>0.5</sub>O<sub>2</sub>
POSTER
Abstract
INTRODUCTION
As transistors scale down, energy inefficiencies become significant due to short-channel effects and quantum tunneling. A promising solution is Negative Differential Capacitance (NDC), achieved by integrating a ferroelectric layer like zirconium-doped hafnia (Hf0.5Zr0.5O2, HZO) into the transistor’s gate stack. Our research demonstrates how HZO-enabled NDC improves the electrical performance of FETs, providing a pathway to overcome traditional scaling limits.
METHOD
HZO films were deposited using thermal Atomic Layer Deposition at 250°C with tetrakis-(ethylmethylamido) hafnium and zirconium precursors to ensure a 1:1 HfO2
ratio. Rapid Thermal Annealing at 600°C was performed to induce an orthorhombic phase transformation in the 10 nm HZO layer. The stress created between Ti/Pt electrodes and the HZO layer facilitated this phase transition.
RESULTS
NDC FETs exhibit a sub-thermionic subthreshold swing (SS < 60 mV/dec), low hysteresis (~25 mV), and minimal gate leakage (~pA). These devices outperform traditional FETs, offering low power consumption and enhanced performance. The findings highlight the potential of NDC in HZO thin films for future ultra-low-power electronics, further pushing the boundaries of transistor scaling and energy efficiency.
As transistors scale down, energy inefficiencies become significant due to short-channel effects and quantum tunneling. A promising solution is Negative Differential Capacitance (NDC), achieved by integrating a ferroelectric layer like zirconium-doped hafnia (Hf0.5Zr0.5O2, HZO) into the transistor’s gate stack. Our research demonstrates how HZO-enabled NDC improves the electrical performance of FETs, providing a pathway to overcome traditional scaling limits.
METHOD
HZO films were deposited using thermal Atomic Layer Deposition at 250°C with tetrakis-(ethylmethylamido) hafnium and zirconium precursors to ensure a 1:1 HfO2
ratio. Rapid Thermal Annealing at 600°C was performed to induce an orthorhombic phase transformation in the 10 nm HZO layer. The stress created between Ti/Pt electrodes and the HZO layer facilitated this phase transition.
RESULTS
NDC FETs exhibit a sub-thermionic subthreshold swing (SS < 60 mV/dec), low hysteresis (~25 mV), and minimal gate leakage (~pA). These devices outperform traditional FETs, offering low power consumption and enhanced performance. The findings highlight the potential of NDC in HZO thin films for future ultra-low-power electronics, further pushing the boundaries of transistor scaling and energy efficiency.
Publication: At this time, there are no publications, submitted manuscripts, preprints, or planned papers derived from this work.
Presenters
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WONWOO LEE
Sungkyunkwan University
Authors
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WONWOO LEE
Sungkyunkwan University
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jeehwan lee
sungkyunkwan univercity
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Woojong Yu
Sungkyunkwan University