Rise of conditionally clean ancillae for optimizing quantum circuits
ORAL
Abstract
We argue by example that conditionally clean ancillae, recently described by [NZS24], should become a standard tool in the quantum circuit design kit. We use conditionally clean ancillae to reduce the gate counts and depths of several circuit constructions. In particular, we present:
(a) n-controlled NOT using 2n Toffolis and O(log n) depth given 2 clean ancillae.
(b) n-qubit incrementer using 3n Toffolis given log*(n) clean ancillae.
(c) n-qubit quantum-classical comparator using 3n Toffolis given log*(n) clean ancillae.
(d) unary iteration over [0, N) using 2.5N Toffolis given 2 clean ancillae.
(e) unary iteration via skew tree over [0, N) using 1.25 N Toffolis given n dirty ancillae.
We also describe a technique for laddered toggle detection to replace clean ancillae with dirty ancillae in all our constructions with a 2x Toffoli overhead. Our constructions achieve the lowest gate counts to date with sublinear ancilla requirements and should be useful building blocks to optimize circuits in the low-qubit regime of Early Fault Tolerance.
(a) n-controlled NOT using 2n Toffolis and O(log n) depth given 2 clean ancillae.
(b) n-qubit incrementer using 3n Toffolis given log*(n) clean ancillae.
(c) n-qubit quantum-classical comparator using 3n Toffolis given log*(n) clean ancillae.
(d) unary iteration over [0, N) using 2.5N Toffolis given 2 clean ancillae.
(e) unary iteration via skew tree over [0, N) using 1.25 N Toffolis given n dirty ancillae.
We also describe a technique for laddered toggle detection to replace clean ancillae with dirty ancillae in all our constructions with a 2x Toffoli overhead. Our constructions achieve the lowest gate counts to date with sublinear ancilla requirements and should be useful building blocks to optimize circuits in the low-qubit regime of Early Fault Tolerance.
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Publication: https://arxiv.org/abs/2407.17966
Presenters
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Tanuj Khattar
Google LLC
Authors
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Tanuj Khattar
Google LLC
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Craig M Gidney
Google LLC