Thermal circuit model for silicon quantum-dot array structures

Heating is a critical issue in large-scale quantum computers based on quantum-dot (QD) arrays. The rise in electron temperature due to heating leads to shorter coherence times, readout errors, and an increase in charge noise. To address this issue, we investigate the optimal design of the heat inflow paths in QD array structures, a crucial step toward mitigating the heating effects. Here, we propose a simple thermal circuit model to describe the heating effect of the silicon QD array. In our model, each element of the QD array is described by an effective thermal circuit by considering the thermal properties using the Wiedeman-Franz law. This results in a thermal transmission line. To validate our model, we measured the electron temperature in a QD array device using Coulomb blockade thermometry. We found that our model reproduces the experimental result. We further confirmed the validity of both our model and experimental results by COMSOL Multiphysics®, which can capture the detailed structure and thermal distribution of small devices. Our model is not only simple and intuitive but also scalable, paving the way for optimizing the thermal structure of large-scale quantum computers in silicon.