Characterization of Si-MOS quantum dots fabricated by advanced semiconductor fab

Fault-tolerant quantum computers based on silicon quantum dot (Si QD) spin qubits will require building reliable and reproducible large-scale quantum dot arrays. Due to the small length scales involved, the fabrication in university cleanrooms is pushed to its limits, resulting in small yield and poor uniformity. However, the compatibility of Si QD structures with modern industrial CMOS fabrication promises a solution to scalability and improved yield and uniformity.

In this work, we characterize a Si-MOS triple quantum dot array fabricated in IMEC's 300 mm state-of-the-art cleanroom. Double and triple dot regimes were investigated using two on-chip SET charge sensors. The devices were readily tunable to the double dot regime, exhibiting low charge noise and excellent stability for approximately 1–2 weeks, without requiring retuning of the dots or charge sensor. Magnetospectroscopy and Pauli spin blockade measurements were employed to characterize the dots, with the latter serving as a qubit readout mechanism. Additionally, relaxation within the blockade was studied as a function of detuning and interdot tunnel coupling, and Rabi oscillations were measured. Latching techniques were used to improve the visibility of coherent driving experiments potentially.