Test methodology and long timescale studies of CMOS-fabricated superconducting qubits

To address current challenges in scaling quantum computing systems, we are developing CMOS-compatible fabrication of superconducting qubits using only industrial processes. For this endeavor, providing rapid feedback on qubit device parameters and performance is essential. In this contribution, we will present our comprehensive studies towards establishing customized test methodologies for both efficient process control monitoring and reliable device (pre-)characterization before time-consuming cryo-measurements are performed. This includes comprehensive wafer-level pre-characterization of qubits at room temperature and low-temperature spectroscopic and time-domain measurements of a large number of qubit chips. In addition, we use long-term cryo-measurements, spanning over timescales of several days, as a tool to both understand the long-term stability of our CMOS-fabricated transmon qubits and to gain insight into correlations between different qubit parameters. Moreover, we conducted temperature-dependent measurements of relaxation times. From these studies, we have been able to experimentally uncover and physically describe important relationships that will enable the practical use of our qubits, including the prediction of qubit frequencies from room temperature measurements, qubit coherence stability, and different contributions to decoherence.