A hardware interlock system to protect pixel modules for the ATLAS ITk detector safe during testing

The Large Hadron Collider (LHC), located in Geneva, Switzerland, is a state-of-the-art particle collider known for the discovery of the Higgs boson. The High Luminosity LHC (HL - LHC) aims to raise the luminosity from 1034 cm^−2s^−1 to 5−7×1034 cm−2s−15−7×1034 cm−2s−1, necessitating the development of advanced pixel detectors that can endure increased radiation. Luminosity refers to the number of particle collisions per unit area. At Lawrence Berkeley National Laboratory (LBNL),we are responsible for verifying the electrical properties of the pixel modules that will be installed in the detector. A critical aspect of this testing involves evaluating the performance of the pixel detectors under different temperatures ranging from -40 C to -20 C. These temperatures can lead to condensation, posing a risk of damage to the pixel modules. To mitigate this risk, we are implementing an interlock fail-safe system designed to halt operations in the event of condensation buildup. This interlock system is essential for ensuring the reliability and functionality of the upgraded LHC detectors.