Realization of spin torque majority gate logic operation with current induced domain wall motion
POSTER
Abstract
Recently, a study to reduce the power consumption required for artificial neural network (ANN) system calculating is being actively discussed. Due to the bottleneck phenomena or inefficient data transfer method, conventional Von Neumann architecture is improper for the role of the logic calculation of the ANN system. As one of the substitutes, the spin torque majority gate (STMG) is paid attention to for developing logic devices with ultralow power consumption.
We selected the Ta/Pt/Co/Ru heterostructure which has perpendicular magnetic anisotropy to implement logic state 1(+mZ) or 0(-mZ). And the magnetization state is observed by the Kerr microscope. The dark region and bright region of images mean +mZ and -mZ direction of magnetization, respectively. And the domain wall motion for the logic operation was driven by the current. To write the domain (logic state) with field-free spin-orbit torque (SOT) switching, we introduce the slab structure[1]. Using this method, we could write the domain in each input area. The output state should be the majority state of the domain for each combination of inputs. we could verify the majority logic operation by evaluating the change of output state into 0(+mZ) state with 001 input. Through this result, we realized the STMG unit cell logic operation as the first stage of the study of a promising spin-based device.
[1] Suhyoek An, et al. Appl. Phys. Lett. 120, 262402 (2022).
We selected the Ta/Pt/Co/Ru heterostructure which has perpendicular magnetic anisotropy to implement logic state 1(+mZ) or 0(-mZ). And the magnetization state is observed by the Kerr microscope. The dark region and bright region of images mean +mZ and -mZ direction of magnetization, respectively. And the domain wall motion for the logic operation was driven by the current. To write the domain (logic state) with field-free spin-orbit torque (SOT) switching, we introduce the slab structure[1]. Using this method, we could write the domain in each input area. The output state should be the majority state of the domain for each combination of inputs. we could verify the majority logic operation by evaluating the change of output state into 0(+mZ) state with 001 input. Through this result, we realized the STMG unit cell logic operation as the first stage of the study of a promising spin-based device.
[1] Suhyoek An, et al. Appl. Phys. Lett. 120, 262402 (2022).
Presenters
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Dongryul Kim
Daegu Gyeongbuk Institute of Science and, Daegu Gyeongbuk Institute of Science and Technology, DGIST
Authors
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Dongryul Kim
Daegu Gyeongbuk Institute of Science and, Daegu Gyeongbuk Institute of Science and Technology, DGIST
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Chun-Yeol You
Daegu Gyeongbuk Institute of Science and Technology, DGIST
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June-Seo Kim
Daegu Gyeongbuk Institute of Science and Technology
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Jaehun Cho
Daegu Gyeongbuk Institute of Science and Technology
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Soobeom Lee
Daegu Gyeongbuk Institute of Science and Technology, DGIST
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Seong Bok Kim
Daegu Gyeongbuk Institute of Science and Technology
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Jun-Su Kim
Daegu Gyeongbuk Institute of Science and Technology (DGIST), DGIST