Electronic Transport in Atomically Precise Semiconductor Tunnel Junctions

Electron tunnelling is of fundamental importance in the design and operation of semiconductor nanostructures such as field effect transistors (FETs) and quantum computing devices. The exponential sensitivity of tunnelling requires precision fabrication techniques to engineer the desired tunnelling resistances/tunnel rates for high fidelity spin readout and qubit exchange. To compliment these fabrication techniques, accurate modelling at the atomic scale is useful for predictive device design, becoming more complex when devices have arbitrary shapes/geometries. In this work we combine atomic precision patterning using STM lithography with tight-binding Non-equilibrium Green's Functions (TB-NEGF) modelling to describe the dependence of tunnelling on junction length in monolayer degenerately phosphorus doped silicon tunnel junctions. We find near perfect agreement between experiment and modelling with our model allowing us to accurately determine the barrier height (57.5 meV ± 1 meV) and lateral seam width (0.39 nm ± 0.01 nm) of these nanoscale junctions. Our work suggests that further applications of the TB-NEGF formalism to semiconductor nanostructures will provide detailed knowledge of devices electrostatics and tunnelling properties, enabling improved device performance at the nanoscale.