Characterization of Silicon based Charge and Spin qubits in a 22nm Commercial FD-SOI Process

The monolithic integration of the semiconductor qubit array and its associated classic control circuitry manufactured in a commercial CMOS foundry process is a key enabler of a scalable quantum processor with thousands of Qubits as an alternative to superconducting structures. As a result, the highly integrated single chip solution provides greater flexibility in design space due to the simplified and seamless control interface and low thermal budget compared to a multi-chip solution where the cryogenic control and qubit substrate are placed at different temperature stages in a cryocooler. While the superiority of analog and digital signal processing of CMOS transistors in Si substrate operating at cryogenic temperatures has been established, the impact on qubit fidelity in a commercial CMOS process has to be understood. In this work, we present our latest measurement results on charge and spin qubits in a double and triple quantum dot structure fabricated in a fully depleted silicon-on-insulator (FD-SOI) process from GlobalFoundries at 3.5K. Based on those results, broader projections and implications on qubit technology and the viability of quantum error correction will be discussed.