Characterizing interconnects to 325 GHz

Circuit designers couple active device layers and passive signal transmission layers in heterogeneous integrated circuits using high frequency interconnects (ICs). ICs transmit electrical signals between layers either with (contact) or without (contactless) direct electrical contacts. The state-of-the-art procedure for characterizing ICs uses multiline thru-reflect-line (TRL) calibration kits for the transmission line on each side of the IC to translate the measurement reference planes to the IC boundaries. This approach assumes that it is possible to directly probe each layer coupled by the IC. However, it is often impossible to probe each layer in multilayer integrated circuits. Consequently, reported scattering (S)-parameter measurements of ICs (S_IC) often include the effects from the IC as well as the transmission line on one or both sides. This calibration problem results in overestimating the insertion loss and obscuring the phase of corrected devices, because the IC is included in the corrected network.

In this talk I present an IC characterization procedure that works by embedding S_IC into the error boxes of a TRL calibration and subsequently de-embedding S_IC using a separate TRL calibration. I begin by introducing an analytical model of distributed contactless ICs. This model shows excellent agreement with full-wave simulations for the case of broadside-coupled coplanar waveguides (CPWs) separated by an SU-8 spacer layer. I then present experimental results where we embed and then de-embed broadside-coupled CPWs from a TRL calibration. We find excellent agreement between our model, simulations, and experimental results. These results validate calibration schemes that embed ICs into the calibration error boxes and provide a pathway to translate measurement reference planes beyond IC boundaries in circuit topologies where certain layers are not directly probable.