Calibrating and benchmarking a distance-5 surface code with superconducting qubits, Part 1

Quantum error correction offers a path to algorithmically-relevant error rates by encoding logical qubits within many physical qubits, where increasing the number of physical qubits enhances protection against physical errors. However, introducing more qubits also increases the number of error sources, so the density of errors must be sufficiently low in order for logical performance to improve with increasing code size. In this talk, we report the measurement of logical qubit performance on distance-3 and distance-5 surface codes on a Sycamore superconducting processor, and demonstrate that our code has sufficient performance to overcome the additional errors from increasing qubit number [1].

In part 2, we discuss the experimental design, circuit compilation and optimization, and surface code data. We also explore a surface code error budget based on a sensitivity analysis.

[1] Suppressing quantum errors by scaling a surface code logical qubit, Google Quantum AI, arXiv:2207.06431 (2022)