Superconducting phonon blocked thermionic coolers
ORAL
Abstract
The full temperature range is realized by cascading multiple cooler stages together by 3D integration. Each stage consists of highly transparent and low leakage semiconductor-superconductor (Sm-S) tunnel-junctions, which also provides phonon isolation and mechanical support. Optimal operation point is provided for each stage by utilizing metals of different superconducting gaps (e.g. Nb, V, Al, Ti). We have demonstrated high quality silicon-vanadium tunnel-junctions [1] and cooled a suspended silicon chip down to 40% below the bath temperature [2,3]. Recently, we have also demonstrated a high thermal resistance in 3D integrated flip-chip device which paves the way for the envisioned device [4].
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Publication: [1] A. Kemppinen et al., Appl. Phys. Lett.119, 052603 (2021)<br>[2] E. Mykkänen et al., Sci.Adv.6, eaax9191 (2020)<br>[3] E. Mykkänen et al., IEEE International Electron Devices Meeting (2020)<br>[4] J. Hätinen et al., in preparation (2022)
Presenters
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Joel Hätinen
VTT Technical Research Centre of Finland
Authors
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Joel Hätinen
VTT Technical Research Centre of Finland
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Janne Lehtinen
VTT Micro & Nanoelectronics, VTT Technical Research Centre of Finland
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Mika Prunnila
VTT Micro & Nanoelectronics, VTT Technical Research Centre of Finland, VTT
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Emma Mykkänen
VTT Technical Research Centre of Finland
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Antti Kemppinen
VTT Technical Research Centre of Finland
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Klaara Viisanen
VTT Technical Research Centre of Finland
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Lassi Lehtisyrjä
VTT Technical Research Centre of Finland
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Alberto Ronzani
VTT Technical Research Centre of Finland