Transistor-Based Self-Learning Networks

Artificial neural networks are powerful tools with an enormous breadth of uses, but their current implementation is reliant on a computational bottleneck - the processor. This restriction is costly both in speed and energy efficiency, and as a result there has been a push to develop distributed learning systems that do not require a processor or external memory. In previous work [1-3] we demonstrated the feasibility of a laboratory system that harnesses physics to perform the forward `computation’ and also exploits physics to enable local learning rules. When each edge of this system, an electrical network of variable resistors, follows these rules independently, the ensemble as a whole approximates gradient descent. Here we demonstrate the second generation implementation of such a system, which uses transistors as variable resistors. The laboratory network of 32 identical repeated edges is capable of performing non-trivial tasks, like data classification, and non-linear tasks, like XOR, without the aid of a processor. The new network is over 1000x faster than the first generation, and already outpaces its in silico counterpart. Furthermore, the new design lends itself easily to micro fabrication. This is important because the speed advantage is expected to grow with the size of the network. We observe the system's dynamics during learning and discuss its scalability, power consumption, and robustness.

[1] S Dillavou, M Stern, DJ Durian, AJ Liu, Demonstration of Decentralized, Physics-Driven Learning, Physical Review Applied, 18, 014040 (2022)

[2] JF Wycoff, S Dillavou, M Stern, AJ Liu, DJ Durian, Learning Without a Global Clock: Asynchronous Learning in a Physics-Driven Learning Network Journal of Chemical Physics, 156, 144903 (2022)

[3] M Stern, S Dillavou, MZ Miskin, DJ Durian, AJ Liu, Physical Learning Beyond the Quasistatic Limit, Physical Review Research, 4, L022037 (2022)