Characterizing errors on multi-qubit superconducting qubit processors for improved circuit compilation and gate decomposition
ORAL · Invited
Abstract
In the current era of noisy quantum processors, the performance of quantum algorithms greatly depends on the nature of errors the processors interact with. Here, we explore the interplay of errors and the structure of gate decomposition in algorithms with experiments on multi-qubit superconducting qubit processors. We describe how we characterize the types of errors afflicting quantum processors, including investigating the context of error with respect to the prior state and multi-qubit environment. We demonstrate how randomization, a key ingredient in characterization, is utilized in circuit compilation to produce predictable algorithm performance with manageable error scaling. Finally, we show how decomposition of gate cycles in algorithms can be optimized to account for the multi-qubit error environment inherently present and characterized in current processors.
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Presenters
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Ravi K Naik
Lawrence Berkeley National Laboratory
Authors
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Ravi K Naik
Lawrence Berkeley National Laboratory