Error Resilient Gate Designs for Dissipative Cat Qubits

The cat qubit encoding is a promising candidate for quantum error correction in bosonic systems. Its inherent exponential protection of the bit value leaves only the need for the quantum phase value of the qubit to be actively corrected. However, its practical implementation may be limited by low gate fidelities and by the poor scaling of usual gate methods with the relevant experimental parameters. Indeed, the typical Hamiltonians that can be engineered in superconducting circuits are very different from the ones that would implement ideal gates on an encoded cat qubit. Hence, cat qubit gates are often only approximated, e.g. using the Zeno dynamics together with the cat stabilization dynamics. In this talk, we will introduce a new perspective on the errors induced by such approximate gate implementations, and build on it to devise four designs that can reduce gate errors by orders of magnitudes at the cost of moderate experimental overhead. These designs should give a broad overview of errors for dissipative cat qubit gates, and inspire new ideas on how to tackle them.