Feedback cooling and active qubit reset using FPGA-based feedback

In circuit QED feedback can be used for active qubit reset and feedback cooling. We present an efficient and general-purpose template-based feedback scheme working with direct digital synthesis and sampling. The feedback latency is limited almost entirely by converter latency. State discrimination can be based on measurements from multiple channels and feedback can be applied to multiple outputs. We demonstrate active qubit reset and feedback cooling on a two qubit sample. We also discuss the process of template optimization using the whole readout response rather than just the I/Q-quadratures.

The feedback is implemented and tested on a platform we call Presto which is based on a radio-frequency system-on-a-chip (RFSoC) from Xilinx. The platfrom has multiple outputs and inputs capable of direct digital synthesis and sampling in the 4-8 GHz band without using analog mixers, all phase-coherent and synchronized to a single master clock.