3-Dimensional Tuning of an Atomically Defined Silicon Tunnel Junction

An important requirement for quantum information processors is the in-situ tunability of tunnelling within the device for optimising high fidelity single shot spin read-out and for tunable coupling of the exchange interaction energy. The large energy level separation for atom qubits in silicon resulting from the strong Coulomb confinement of the donor atoms is well suited for qubit operation but creates challenges for device tunability. In this paper we address control of the simplest tunnelling element in atomic-scale devices – the tunnel junction, a barrier between two phosphorus doped conducting electrodes on one atomic plane. We demonstrate that we can tune the conductance of this critical element by using a vertically separated top-gate aligned with ~5nm precision to the junction. We show that by incorporating this 3D epitaxial top-gate with increased capacitive coupling compared to in-plane gates we can tune the conductance of the tunnel junction by an order of magnitude (equating to a change in the tunnel barrier height from ~0 to 190 meV). By combining multiple gated junctions in series we extend our 3D gating technology to implement transistor-like operations based on electron tunnelling, and simple nanoscale AND and OR logic circuits.