Gate-Set Exploration using High-Quality Numerical Synthesis

We analyze and compare the performance of various proposed hardware-level two-qubit quantum gates. We have chosen gates that are actively being used by hardware quantum, or have been proposed as plausible gates that can be implemented in hardware. Comparison is done by synthesizing a set of benchmark unitaries with a high-quality and gateset-independent synthesis algorithm, and comparing the synthesized circuits in terms of length (adjusted estimated gate runtime and fidelity) and simulated or measured gate error. The set of two-qubit gates we consider consists of CNOT, sqrt(CNOT), iSWAP, sqrt(iSWAP), and Molmer-Sorensen. We also consider the XX and CRz gates with parameterized angles, gatesets that include two hardware-implemented two-qubit gates, and the CNOT and CSUM gates as two-qutrit gates. We then analyze and compare our results, and offer suggestions for potential hardware-level gatesets that offer improved performance over the commonly used gatesets that rely on either CNOT or Molmer-Sorensen.