Exploring high-coherence overlap junction qubits fabricated with a subtractive etch process

State-of-the-art superconducting qubits are fabricated using shadow evaporation and lift-off techniques. However, these are generally not compatible with CMOS manufacturing capabilities, which could greatly help advance the upscaling of qubit architectures. Overlap junction qubits are a promising alternative [1]. During fabrication, the vacuum is broken and Ar milling is needed to remove native oxide before junction oxidation. While this potentially compromises the junction’s integrity, its effect on the qubit performance is still unclear. In our work, we explore fully fab-compatible subtractive etch processes to fabricate overlap junctions, which are studied in different qubit designs. We find that average qubit lifetimes of our best devices exceed 60 μs, with values up to 100 μs. Furthermore, the quality factors of different qubit designs scale in accordance with surface oxide participation ratios, indicating that overlap junctions are not limiting the qubit’s T₁ coherence time up to 60 μs. This work paves the way toward large-scale superconducting qubit integration with industrially standardized process techniques.

[1] A. Stehli et al., Appl. Phys. Lett. 117, 124005 (2020)