Modeling Scalable Logic Devices Based on Multiferroic and Ferroelectric Materials with the ARTEMIS Framework

Fundamental understanding and design of ferroelectric/multiferroic materials and devices for logic-in-memory and transistor enhancement is essential to enable low switching energies and thereby revolutionary power reductions in computing. Modelling these devices is challenging due to coupling between different physical phenomena at multiple spatial and temporal scales. We have developed a massively parallel code framework, ARTEMIS, to model the next generation of beyond-CMOS microelectronic devices. ARTEMIS contains a finite-difference time-domain (FDTD) algorithm for Maxwell’s equations coupled with a magnetization model described by the Landau-Lifshitz-Gilbert (LLG) equation. ARTEMIS has been developed in the framework of Exascale Computing Project software, AMReX, and leverages some key functionalities from the WarpX electromagnetic Particle-In-Cell code. Support for dispersive material properties, user-defined excitations and boundary conditions, and heterogeneous physical coupling that can be present in next-generation devices has been implemented. Code’s structure, capabilities, and performance will be summarized and it's application in modeling ferroelectrics in transistor logic and multiferroic logic-in-memory devices will be presented.