Quantum circuits for topological state generation

Given their potential for fault-tolerant operations, topological quantum states are currently the focus of intense activity. Topological states are generally obtained as the gapped degenerate ground states of a suitably chosen Hamiltonian. In the quantum circuit model of quantum state generation, however, one doesn't usually have access to the Hamiltonian. Interesting open questions include: what are the main properties that these states need to satisfy to ensure that they are topologically ordered, how can one prepare such a family of states on a quantum circuit, and what is the circuit complexity for the topological state preparation? In this work, we use the correspondence between stabilizer topological codes and graph states to obtain explicit families of quantum circuits for topological state generation. Making use of the relationship between topological order and quantum error correction codes with a code distance that scales as a polynomial in the number of qubits, we show that the scaling of quantum circuit depth complexity as the square root of the number of qubits when only geometrically local gates are permitted reduces to a logarithmic scaling if this restriction is relaxed.