Characterization of superconducting transport in CMOS PtSi transistors for scalable qubits

Scalability in fabrication and operation is key to move beyond the NISQ era. So far, superconducting transmon qubits, based on aluminum tunnel Josephson junctions, have demonstrated the most advanced achievements. However, this technology is difficult to use at large scale. Recently, an alternative "gatemon” has appeared using hybrid superconducting/semiconducting (S/Sm) nano-devices as gate-tuned Josephson junctions. Current implementations use nanowires, of which the large-scale fabrication has not yet matured. CMOS Josephson Field-Effect Transistors may be used instead as tunable weak link in a scalable gatemon design.

We present experimental results on a 50 nm gate length PtSi transistor, where the transparency of the S/Sm interfaces is modulated by the gate voltage. At low gate voltage, the transport shows no conductance at low energy with well-defined features at the superconducting gap. Increasing the gate voltage reduces the barrier height at the S/Sm interface up to the appearance of a zero bias peak around zero drain voltage which reveals the appearance of an Andreev current. These results suggest the feasibility of fully CMOS-integrated gatemon devices.