General-Purpose firmware for controlling quantum processors
ORAL
Abstract
FPGAs are ideally suited to the classical, digital control of quantum hardware. However their low-level programming is time consuming making them inconvenient for laboratory exploration. We present a general-purpose firmware for the Xilinx Zynq UltraScale+ RFSoC platform which allows for flexible implementation of quantum readout and control sequences through a Python API. Our approach allows for a wide variety of experiments with fine-tuning performed at runtime, without reloading large blocks of memory.
The classic approach to pulse sequencing requires uploading long blocks into the memory of an arbitrary-waveform generator. Even with high-speed data transfer this operation can take up a significant portion of an experiment runtime. As quantum processors scale up the number of qubits and control/readout lines, such data transfer quickly becomes a bottleneck. We solve this problem by parameterizing the signals, breaking them into smaller templates that can be concatenated, added, up or down converted, and stretched in time. This approach gives a high level of customization with only a few parameters uploaded to the device.
The classic approach to pulse sequencing requires uploading long blocks into the memory of an arbitrary-waveform generator. Even with high-speed data transfer this operation can take up a significant portion of an experiment runtime. As quantum processors scale up the number of qubits and control/readout lines, such data transfer quickly becomes a bottleneck. We solve this problem by parameterizing the signals, breaking them into smaller templates that can be concatenated, added, up or down converted, and stretched in time. This approach gives a high level of customization with only a few parameters uploaded to the device.
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Presenters
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Mats Tholen
KTH Royal Inst of Tech
Authors
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Mats Tholen
KTH Royal Inst of Tech
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Riccardo Borgani
KTH Royal Inst of Tech
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David Brant Haviland
KTH Royal Inst of Tech