Dielectric loss at material interfaces in circuit quantum electrodynamics devices

Performance of circuit quantum electrodynamics (cQED) devices, such as superconducting qubits and coplanar-waveguide (CPW) resonators, is typically limited by dielectric losses that occur in the substrate and, in particular, in the thin dielectric regions at the material interfaces. These losses can be simulated utilizing finite-element modeling, but reliable extraction of the relevant material parameters of these regions is challenging, introducing uncertainty to the simulations. Moreover, the wide span of length scales, ranging from sub-nanometer feature size in the thin interface regions to micrometer and millimeter scales of the device structures, poses significant challenges on, e.g., finite-element meshing and numerical convergence. In this work, we discuss methods for measurement-based extraction of the material parameters and ways to overcome the challenges related to the wide range of length scales. The developed methods and obtained results guide the fabrication of low-loss cQED devices, such as CPW resonators and transmon qubits.