A Stochastic Model for Logic Circuits
ORAL
Abstract
We introduce a minimal stochastic model for complementary logic gates built with field-effect transistors. We characterise the performance of such gates with tools from information theory, and study the interplay between the accuracy, speed, and dissipation of computations. With a few universal building blocks, such as the NOT gate and the NAND gate, we are able to build arbitrary combinational and sequential logic circuits, and implement computing tasks. Our work provides a platform to study designing principles for low-dissipation digital devices, within the framework of stochastic thermodynamics.
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Presenters
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Chloe Gao
University of California, University of California, Berkeley
Authors
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Chloe Gao
University of California, University of California, Berkeley
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Gavin E. Crooks
Berkeley Institute for Theoretical Science
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David Limmer
University of California, University of California, Berkeley