Exponential suppression of bit or phase flip errors using repetition codes on superconducting qubits (Part I)

Practical applications using quantum computers will require error rates below 1e-10, but state-of-the-art hardware features physical error rates near 1e-3. Quantum error correction theoretically promises to bridge this divide by combining physical qubits into logical qubits, and exponentially reducing error rates according to the number of physical qubits used. In this work, we run distance 3-11 repetition codes and distance 2 surface codes in the Sycamore superconducting qubit architecture. Using repetition codes, we demonstrate exponential suppression of bit or phase errors with 100x reduction in error rate from d=3 to d=11, even after 50 rounds of measurement. We also show that our device is well described by a simple depolarizing error model, allowing us to project the performance of larger codes. The exponential suppression of error and validation of theoretical assumptions about the behavior of errors provides further evidence that surface codes with superconducting qubits are a viable path towards a fault tolerant quantum computer.

In part 1, we discuss the details of the layout of the repetition code on a Sycamore device, the component error rates for each section of the circuit, and the use of dynamical decoupling techniques for error mitigation in the phase flip codes.