Implementation of continuous multi-qubit gate families on superconducting quantum processors

Quantum processors in the noisy intermediate-scale (NISQ) era will rely on the decomposition of complex, error-prone circuits into the fewest possible native pulse operations. This is especially true of computations involving entangling operations parameterized by one or more continuous variables, such as the UXY (universal XY) and UZZ (universal CPHASE) gates, which are useful in near-term quantum chemistry and combinatorial optimization problems and can dramatically reduce overall circuit length relative to circuits relying only on simple Clifford rotations, such as CZ. Here we extend our technique for generating the UXY family of gates [1] to produce the UZZ gates gates via the calibration of a single pulse, enabling high fidelity for arbitrary rotation angles in the two-qubit space. We present our latest results for each of these gate families on our current class of superconducting quantum processors, and additionally construct arbitrary fermionic simulation (fSIM) gates and the three qubit controlled-controlled phase (CCPHASE) gates.

[1] D. M. Abrams, N. Didier, B. R. Johnson, M. P. da Silva, and C. A. Ryan, Implementation of the XY Interaction Family with Calibration of a Single Pulse, ArXiv:1912.04424 [Quant-Ph] (2019).