Scalable packaging for superconducting qubits with vertical wiring

Superconducting quantum circuits are one of the most promising platforms for realizing a large-scale quantum computer. To implement realistic quantum error correction codes, such as surface codes, we aim at integrating a two-dimensional array of superconducting qubits in a scalable way. Therefore, a natural strategy for the chip packaging is to use the third dimension for the wiring. Here we demonstrate a packaging scheme for a qubit chip, where coaxial cables for the control and readout of qubits are vertically connected to the backside of the chip. The electrical contacts between the superconducting circuits and coaxial cables are provided by spring probes and superconducting through-silicon via. We will present the design and performance of the chip and package.