Increasing open-circuit voltage in CdTe solar cells through passivation of the previously inaccessible front interface

Cadmium telluride (CdTe) is the leading commercialized thin-film photovoltaic (PV) technology with over 25-GW-scale annual production and record device efficiency of 22.1%. However, a major obstacle to achieving higher efficiencies in CdTe is a stubbornly low open-circuit voltage (V_OC) of ~800-900 mV despite having a near ideal bandgap of 1.45 eV. Surface passivation, particularly of the front interface, is thought to be critical to reduce electron-hole recombination and increase V_OC. The front interface, however, is buried under microns of material during standard growth of superstrate CdTe and made inaccessible. Here, we use a novel thermo-mechanical liftoff technique to expose the buried front interface, then passivate the surface to improve minority carrier lifetime measured using time-resolved photoluminescence (TRPL). We then complete the device by depositing a transparent front contact to correlate V_OC changes in the front interface and minority carrier lifetime.