The Effect of Semiconductor Nanostructures on the Performance of Nanometer-Thick Parallel Plate Capacitors

We fabricate nanometer thick, parallel plate capacitors which have semiconductor nanostructures as their dielectric spacers and investigate their capacitance as a function of geometry and the type and thickness of spacer and metal plates. Selected semiconductors are SrTiO3 nano-powder and GaAs and Si nanowires (NW) which have relatively high dielectric constants. 30 nm and 60 nm thick Au plates are fabricated on both solid glass and flexible poly (methyl methacrylate) substrate using an electron beam deposition system. The vertically aligned 50 nm diameter GaAs NWs were grown using the Au catalyzed vapor-liquid-solid method. The Si NWs are randomly oriented with an average diameter of 70 nm. The SrTiO3 nano-particles are cubical with a width of around 30 nm. The reference sample, Au plates with air as dielectric, reveal capacitance in the pico-Farad order. However, capacitor structures with semiconductor dielectrics show an enhancement of the total capacitance, mainly explained by the semiconductor spacer weakening the effective internal electric field. Photoluminescence measurements on the semiconductors adjacent to Au plates also show an energy transfer from semiconductor excitons to plasmon oscillations in the Au plates.