Ferroelectric Control of Normal and Superconducting States in Oxide Interface by Intrinsic and Extrinsic Bias

We deposit the polar oxide LaAlO₃ on Ca doped SrTiO₃ with various Ca concentrations. The latter becomes ferroelectric below 30K. The resulting interface is conducting with a critical thickness of 3 unit cells of LaAlO₃. A large increase in the interface resistance is observed as the temperature is decreased below the ferroelectric transition with a strong hysteretic behavior as a function of gate voltage. Below T_c 300mK the sample becomes superconducting with a clear hysteresis in T_c with respect to the applied gate voltage. We use scanning SQUID to image the current flow patterns and follow them as a function of gate voltage. We find that the polar LaAlO₃ induces an effective gate bias even when cooling down at zero applied electric field. This effective gate bias has a three-fold effect: it pins the ferroelectric domains near the interface, it reduces the carrier density and confines the current flow. We suggest this effective gate bias as a way to control the initial state of a ferroelectric material. The hysteresis observed both in the normal state and in the superconducting one can lead to a multifaceted controllable memory device.