Link Testing between the Data Formatter and Second Stage Boards for the Fast Tracker Trigger in the ATLAS Experiment at CERN

At CERN, link testing was performed between the Data Formatter (DF) board and the Second Stage Board (SSB). This was to advance the installation of the Fast Tracker Trigger (FTK) for the ATLAS collaboration by the end of the 2^nd Long Shutdown (LS2). Link testing was performed in the Underground Service ATLAS hall (USA 15) where the FTK is located. Different combinations of the Data Formatter board and Second Stage Board were tested using Xilinx’s Integrated Bit Error Ratio Tester (IBERT) to vary the transceiver and receiver settings between the boards. To analyze the bit error ratio between the boards, the IBERT core would generate eye scans and bathtub plots to get a visualization of the digital signal integrity.