High-yield, high-mobility mixed halide perovskite field-effect transistors operating at room temperature

Hybrid halide perovskites combine the ease of processing inherent to organic compounds with the high performance of inorganic materials. Charge transport in perovskite field effect transistors (FETs) is strongly dependent on the quality of the perovskite film and that of the semiconductor/dielectric interface. Si/SiO$_{\mathrm{2\thinspace }}$substrates are widely used as gate electrode/dielectric platforms in thin-film transistors. This architecture, however, was previously unsuccessful for perovskite transistors at room temperature due to a combination of high interfacial trap densities, defect states in perovskite films, and possibly ionic transport. In this study, we incorporated the hybrid halide perovskite CH$_{\mathrm{3}}$NH$_{\mathrm{3}}$PbI$_{\mathrm{3-x}}$Cl$_{\mathrm{x}}$ in FETs with Si bottom-gate electrode and SiO$_{\mathrm{2}}$ dielectric. We obtained working devices at room-temperature by drastically improving the quality of the perovskite layer using film processing techniques such as solvent annealing to increase the uniformity and coverage, and by encapsulation in hydrophobic polymers to protect from moisture. The resulting films provided a high yield of ambipolar FETs with uniform operation, achieving reproducible room temperature hole mobilities on the order of 1 cm$^{\mathrm{2}}$/Vs, and electron mobilities on the order of 0.1 cm$^{\mathrm{2}}$/Vs. We show that this is due to lowering the trap-density in the transistor channel by increasing the grain size, thus reducing the density of grain boundaries, and minimizing ionic migration, which occurs predominantly at grain boundaries.