Electron Spin Resonance Characterization of Damage and Recovery of Si/SiO$_{2}$ Interfaces from Electron Beam Lithography

Electron beam lithography (EBL) is an essential tool for the fabrication of few electron silicon quantum devices. However, high-energy electrons and photons from the EBL process create shallow traps and other defects at the Si/SiO$_{2}$ interface, inhibiting the control of electron populations through electrostatic gating. To reduce defect densities, high temperature and forming gas anneals are commonly used. We studied the effect of these anneals on the reduction of shallow traps created by EBL by fabricating two sets of large area ($\sim$1cm$^{2}$) MOSFETs and characterizing them using transport and electron spin resonance (ESR) measurements. One set was exposed to a typical EBL dosage (10kV, 40$\mu$C/cm$^{2}$) and the other remained unexposed. All MOSFETs were fabricated from the same commercially grown gate stack (30nm dry thermal oxide, 200nm amorphous silicon gate layer) and were annealed at 900C in N$_{2}$ and at 435C in forming gas. Our transport data indicate that these annealing steps recover the EBL exposed sample's low temperature (4.2K) peak mobility to 85$\%$ of the unexposed sample's. Additionally, our ESR data indicate that annealing the EBL exposed sample reduces its density of shallow traps (2-4 meV) to the same density as the unexposed sample.