Surface conduction in encapsulated topological gated structures

In three-dimensional (3D) topological insulators (TIs), the surface Dirac fermions intermix with the conducting bulk, thereby complicating access to the low-energy surface charge transport or magnetic response. The subsurface 2D states of bulk origin are vulnerable to bandbending due to surface adatoms, a band modification thought to be responsible for the `ageing' effect. To minimize this effect, we have developed an inert environment mechanical exfoliation technique to fabricate transistor-like gated structures in which prototypical binary TIs as well as ultra-low bulk carrier density ternaries (such as Bi$_2$Te$_2$Se) were encapsulated by thin h-BN layers, with electrical contacts made using exfoliated graphene. The effects of electrostatic tuning by the gate bias voltage on surface conductivity as a function of thickness of the TI layers and the variation with disorder will be presented.