Flip Chip: Keep pristine materials clean

We introduce the Flip Chip setup, a new platform which allows nanoscale electrical gating of a material without exposing it to invasive nanoprocessing. The conventional fabrication of metallic gate structures on pristine materials degrades their interesting properties, e.g., ultra-high mobility in GaAs heterostructures. This research takes a new approach to keep the material unaffected. The gate structure is fabricated on a separate chip which is flipped and brought close (\textless 100 nm) to the sample under research. A vacuum gap between the gates and material, acting as an insulating layer, solves the problem of leakage and trapped charges in traditional gate-dielectrics. In addition, this approach allows more freedom in fabrication methods, as the `dirty' processing is done on a separate chip. With the Flip Chip setup we intend to study the 5/2 FQH state in GaAs heterostructures which is expected to have non-Abelian statistics. I will present measurement results for an interferometer at integer quantum Hall states using the Flip Chip technique.