Atomistic approach to study charge and current distribution in ultra-scaled SiGe/Si core/shell nanowire FETs

Recent development in the fabrication processes have enabled the manufacturing of ultra-scaled, high mobility SiGe/Si core/shell nanowire FETs (NWFETs). These NWFETs are meant to break the speed bottleneck of CMOS devices by enhancing the performance of pMOS devices as well as making nMOS devices faster. These devices operate under strong geometrical and potential confinements where quantum effects are dominant. In this work we study these ultra-scaled NWFETs using an atomistic Tight-Binding based modified Virtual Crystal Approximation method, for electronic structure calculation, coupled to a top-of-the-barrier quantum transport model. Variation in the bandstructure with Si shell thickness and Ge concentration in the core are studied. This allows us to capture the effect of bandstructure on the charge and current distribution in these NWFETs. Higher Ge concentration and optimal Si shell thickness are necessary to provide good performance in both n and p type devices. Further improvement in the performance of p-type devices can be achieved by using high-k gate dielectric material.