Electron transport of nanoscale P-donor wires in silicon

Three dimensional carrier transport in doped semiconductors has been extensively investigated. However, transport in low-dimensions is much less clear because of the difficulty to confine dopant distribution in a crystal. In the past few years we have created 2D embedded dopant sheets by exposing Si(100) surfaces to phosphine molecules in ultrahigh vacuum followed by growing epitaxial silicon over-layers at room temperature. Electron density in these delta layers can be as high as $\sim $1.5x10$^{14}$ cm$^{-2}$. We find that surface roughness dictates the carrier mobility and activation, even though all surfaces are atomically clean and locally ordered. Furthermore, applying STM e-beam lithography on a single-layer H-resist enables us to define P-donor wires at widths from 200 nm to 5 nm in 2-terminal device templates. The As-implanted electrodes in the device templates provide ohmic contact with P-donor wires. In this presentation we will discuss our electrical and magneto-resistance measurement of various P-donor nanostructures at cryogenic temperatures. The goal of this research is to apply 2D P-donor patterns as building blocks for nanoscale integrated circuits.