Programmable logic in the nanocell

ORAL

Abstract

The investigated nanocell is a two-dimensional network of self- assembled metallic particles connected by molecules that show reprogrammable (i.e. can be switched between high and low conductance states) negative differential resistance (NDR). The nanocell is surrounded by four lithographically defined I/O leads at the edges of the nanocell. By selectively turning molecules on and off, the nanocell can be programmed to implement a set of logic gates. So far, no methods for programming the nanocell by only applying voltages to the access leads have been demonstrated (1). Using the nanocell circuit model described in (1), we will show that there is set of simple target circuit diagrams that implement the logic gates required for the architecture also described in (1). We will then show that the target circuit diagram is simple enough to, under certain assumptions, allow the nanocell to be programmed by applying voltages to the I/O pins. 1. C Husband, S Husband, et al. (2003). ``Logic and memory with nanocell circuits." IEEE Transactions on Electron Devices 50(9): 1865- 1875.

Authors

  • Jonas Skoldberg

  • Goran Wendin

    MC2, Chalmers University of Technology, SE-412 96 Göteborg, MC2, Chalmers Univ of Technology, Gothenburg, Sweden, Chalmers Univ of Technology, Gothenburg, Sweden