2D semiconductor FETs: the role of flake vs dielectric thickness"

Layered semiconductors are being actively studied for their possible application in high-performance field effect transistors (FETs). While transistors made of 2D semiconductors have been realized, the effect of their thickness on device performance is not fully understood. Moreover, the validity of conventional metal-oxide-semiconductor (MOS) equations on these 2D device structures is a topic of great interest. In this paper, we examine the role of 2D semiconductor flake and oxide dielectric thickness in the determination of the subthreshold swing of WSe2 FETs. By extracting the subthreshold swing of various devices with different flake and oxide thicknesses, and comparing it to the subthreshold swing expression derived from MOSFET theory when the semiconductor thickness is used as the depletion width, we are able to validate the use of such equation for the determination of the subthreshold swing in 2D semiconductor FETs. Additionally, we explore how the oxide and semiconductor thicknesses affect the determination of the threshold voltage.