Latchup Tests on pALPIDEfs

In 2018, the ALICE ITS will be upgraded to keep up with new beam requirements. ALPIDE is one of the proposed silicon pixel detector designs; However, the pixel design suffers from a side effect called latch-up. Latchup is inevitable with transistors on such small scale, but it can be minimized if the silicon is designed well. The goal of this experiment is to quantify the probability of latch-up in ALPIDE for different particle cocktails and pixel geometries, to determine the viability of the design. The chip records two currents, from different silicon blocks; when either current rises above a user-set threshold the latchup power cycle process begins. The waveforms began in one of two general shapes, determined by the areas of the sensor that were latching up, but after a potentially damaging event there were several other waveforms that developed, which may have some indication to the damage done to the chip. To attempt to differentiate data that was effected by the damage, a machine learning algorithm using logistic regression was implemented to sort the current waveforms recorded during testing. The algorithm successfully categorizes latchups in 4 different categories, 2 categories of good data, and two particularly frequent categories of damaged waveform.