Single-qubit gates with errors at the 10<sup>-7</sup> level
ORAL
Abstract
We report the achievement of single-qubit gates with sub-part-per-million error rates, in a trapped-ion 43Ca+ hyperfine clock qubit. We explore the speed/fidelity trade-off for gate times 4.4 ≤ tg ≤ 35 μs, and benchmark a minimum error per single-qubit Clifford of 1.5(4) × 10-7. Gate calibration errors are suppressed to < 10-8, leaving qubit decoherence (T2 ≈ 70 s), leakage, and measurement as the dominant error contributions. The ion is held above a microfabricated surface-electrode trap which incorporates a chip-integrated microwave resonator for electronic qubit control; the trap is operated at room temperature without magnetic shielding.
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Publication: M. C. Smith, A. D. Leu, K. Miyanishi, M. F. Gely, D. M. Lucas, Single-qubit gates with errors at the 10^{-7} level, arXiv:2412.04421 (2024)
Presenters
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Molly C Smith
University of Oxford
Authors
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Molly C Smith
University of Oxford
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Aaron D Leu
University of Oxford, Clarendon Laboratory, University of Oxford
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Koichiro Miyanishi
Center for Quantum Information and Quantum Biology, Osaka University
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Mario F Gely
University of Oxford
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David M Lucas
University of Oxford