Integrating ion control at the chip level for a scalable quantum computer "core"

Trapped ions have shown the essential building blocks for scalable quantum computing. First demonstrators are currently operational or under construction, incorporating different aspects and levels of integration and scalability. Increasing the number of qubits while improving gate fidelities to obtain practically useful devices is still a formidable challenge. I will discuss strategies to integrate different aspects of ion control into a scalable trap structure. We use chip-integrated microwave conductors to carry out single-and two-qubit gates rather than the widely used focused laser beams. I will discuss a computation register based on this approach and demonstrate the execution of arbitrary circuits through the implementation of the cycle benchmarking protocol. First steps have been taken towards the hybrid integration of electronic circuitry (a cryogenic DDS circuit) to generate the corresponding microwave control signals for quantum gates. Recent advances in the fabrication of scalable trap structures will be presented, in particular the implementation of through-substrate vias (TSVs) and hybrid integration methods based on TSVs. I will discuss two demonstrators that are currently under construction within the QVLS-Q1 and BMBF "ATIQ" demonstrator projects to build a quantum "core" consisting of the integrated microwave computation register, local storage and an integrated optics state preparation and detection zone.